1. Field of the Invention
The present invention relates to a maximum-likelihood estimation apparatus suitable for digital data transmission.
2. Prior Art
FIG. 1 shows a block diagram of a maximum-likelihood sequence estimation apparatus disclosed in the article entitled "Adaptive Maximum-Likelihood Receiver for Carrier-modulated Data-Transmission System" IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-22, p.624-636, No. 5, May 1974 written by Gottfried Ungerboeck. In this figure, a maximum-likelihood sequence estimation circuit 1 is connected between an input port 2 and an output port 3. An input of a delay circuit 4 is also connected to the input port 2 and an output of the delay circuit 4 is connected to an input of a channel characteristics estimation circuit 5. The output of the maximum-likelihood sequence estimation circuit 1 is also connected to another input of the channel characteristics estimation circuit 5, and an output thereof is connected to the maximum-likelihood sequence estimation circuit 1.
In operation, the maximum-likelihood sequence estimation circuit 1 is supplied with a received signal and, using the Viterbi algorithm, calculates "possibilities" for the respective states at the present time from "possibilities" already calculated and stored from the previously received signal and "possibilities" for the respective states which are a combination of data possibly occurring at the present time, on the basis of an estimated value of channel characteristics estimated by the transmission characteristics estimation circuit 5, and decides the maximum-likelihood sequences for the respective states as survivor sequences from the signal received at the present time. The survivor sequences and the "possibilities" for the respective states are stored in the maximum-likelihood sequence estimation circuit 1. The maximum-likelihood sequence estimation circuit 1 then outputs a transmitted signal, that is, data corresponding to the state which has been selected on the basis of the estimated maximum-likelihood sequence.
The delay circuit 4 provides the received signal with a delay equal to a time required for a survivor sequence of any one of the states to merge to a single sequence at a certain previous time. The channel characteristics estimation circuit 5 receives the outputs from the maximum-likelihood sequence estimation circuit 1 and the delay circuit 4, estimates the channel characteristics and supplies the estimated value of the channel characteristics to the maximum-likelihood sequence estimation circuit 1.
FIG. 2 shows an example of a channel having intersymbol interference. In the figure, {In} denotes a transmitted signal sequence and {rn} a received signal sequence. In this channel, shift registers 6a and 6b store two previous samples of the transmitted signal. The received signal is an output from an adder 8 which adds a transmitted signal I.sub.n at the present time multiplied by f.sub.0 at a multiplier 7a, a transmitted signal I.sub.n-1 one sample prior to the present time multiplied by f.sub.1 at a multiplier 7b and a transmitted signal I.sub.n-2 two samples prior to the present time multiplied by f.sub.2 at a multiplier 7c. That is, EQU rn=f.sub.0 .multidot.I.sub.n +f.sub.1 .multidot.I.sub.n-1 +f.sub.2 .multidot.I.sub.n-2.
FIG. 3 is a trellis diagram in the case where a transmitted sequence can take a value of 0 or 1 in the example of FIG. 2. When four states 00, 01, 10 and 11 are provided, the Viterbi algorithm which makes a maximum-likelihood estimation possible can be achieved. Thick lines in the drawing indicate estimated values of the final maximum-likelihood sequence, but it is noted that thin lines remain at a time n as survivor sequences. In other words, the sequence decided at the time n is the sequence decided prior to a time (n-3). This value "3" represents an amount of "decision delay".
In the case of making an estimation of channel characteristics, an estimated value of a transmitted signal made from a received signal is usually required. A mean-square error (MSE) method will be taken here as an example. It is assumed that the symbol (n) indicates a time, .DELTA. indicating an adjusting step size. Then, EQU fi(n+1)=fi(n)+.DELTA.e(n)I.sub.n-1 (i=0, 1, 2) EQU e(n)=rn-f.sub.0 (n)I.sub.n -f.sub.1 (n)I.sub.n-1 -f.sub.2 (n)I.sub.n-2.
In actuality, however, the "decision delay" causes an estimation to be delayed by three samples.
In the example described above, the "decision delay" is equal to three samples, but an actual model has possibly a longer decision delay. It is thus necessary to set a decision delay to be equal to the maximum out of the possible delays in the delay circuit, which causes an estimation of channel characteristics to be delayed further.
A maximum-likelihood estimation apparatus of the prior art being constructed such as described above, data cannot be decided on until the survivor sequence for each state is "merged" whereby a "decision delay" is produced. Consequently, if data are used for estimating channel characteristics, a delayed follow up to a change in channel characteristics may be made.